1. Field of the Invention
The present invention is related to an integrated tuner chip, and more specifically an integrated tuner chip having precision self-calibration of an RC time constant utilized by a polyphase filter for improved image rejection.
2. Description of the Prior Art
An integrated tuner chip typically uses a polyphase filter to combine the I/Q signals from a quadrature mixer to form an image rejection mixer. The image rejection performance of the overall structure highly depends on how well the RC time constant matches a desired value. However, a typical process has a resistance variation of about +/−20% while the capacitance may vary up to +/−10%. Obviously these variations make it difficult to have the RC time constant consistently match the desired value. A calibration of the RC time constant is therefore necessary for the polyphase filter.
One prior art RC time constant calibration approach disclosed in U.S. Pat. No. 5,245,646 issued to Jackson et al. uses a reference clock to count a pulse that depends on the RC time constant. A problem with this method is that the reference clock cannot be arbitrarily high in frequency and the digital counter itself has a limit. Greater flexibility and precision is desired in calibration of the RC time constant to improve image rejection characteristics of the integrated tuner chip.